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6.6:

Kirchoff’s Laws using Phasors

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Electrical Engineering
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JoVE Core Electrical Engineering
Kirchoff’s Laws using Phasors

Lingue

Condividere

Consider a household circuit where an AC power supply from the distribution panel is wired to appliances in parallel.

Analyzing an AC circuit involves replacing loads with impedance equivalents and transforming voltages and currents to phasor forms.

This AC circuit can be analyzed using  Kirchhoff's voltage and current laws.

When Kirchhoff's voltage law is applied to the first loop in the circuit, it mandates that the sum of phasor voltages in a closed loop equals zero.

In a sinusoidal steady state, these voltages can be represented in the time domain and converted into phasor equivalents.

As the frequency factor cannot be null, the aggregate of the phasor voltages equals zero.

Now, applying Kirchhoff's current law at a node asserts that the total current entering the circuit node is equal to the total current exiting the node.

Expressed in phasor notation, the sum of phasor currents at the node equals zero.

So, Kirchhoff's laws apply to any AC circuit, ensuring zero sums for both phasor voltages in closed loops and phasor currents at nodes.

6.6:

Kirchoff’s Laws using Phasors

Analyzing AC circuits in electrical systems is a fundamental aspect of electrical engineering. In these circuits, AC power is supplied from a distribution panel and wired to various household appliances in parallel. To perform a comprehensive analysis, electrical engineers use Kirchhoff's voltage and current laws, which are equally applicable in AC circuits as in DC circuits.

Kirchhoff's voltage law (KVL) states that the sum of phasor voltages around a closed loop in an AC circuit equals zero. In the sinusoidal steady state, where AC voltages vary sinusoidally with time, these voltages can be represented in the time domain and then converted into phasor equivalents. This process ensures that the sum of the phasor voltages in a closed loop remains zero.

Equation1

Kirchhoff's current law (KCL) applies to circuit nodes, asserting that the total current entering a node equals the total current exiting the node. When expressed in phasor notation, the sum of phasor currents at a node also equals zero.

Equation2

These laws are essential tools for AC circuit analysis and enable engineers to work seamlessly in the frequency domain. They facilitate various tasks such as impedance combination, nodal and mesh analysis, superposition, and source transformation, which are crucial in designing and troubleshooting electrical circuits in residential and industrial settings.