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Fabrication of Gate-tunable Graphene Devices for Scanning Tunneling Microscopy Studies with Coulomb Impurities
 

Fabrication of Gate-tunable Graphene Devices for Scanning Tunneling Microscopy Studies with Coulomb Impurities

Article DOI: 10.3791/52711-v 11:42 min July 24th, 2015
July 24th, 2015

챕터

요약

This paper details the fabrication process of a gate-tunable graphene device, decorated with Coulomb impurities for scanning tunneling microscopy studies. Mapping the spatially dependent electronic structure of graphene in the presence of charged impurities unveils the unique behavior of its relativistic charge carriers in response to a local Coulomb potential.

Tags

Keywords: Graphene Scanning Tunneling Microscopy Scanning Tunneling Spectroscopy Coulomb Impurities Gate-tunable Electronic Properties Charge Carriers Hybrid Device Fabrication
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